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the information in this document is subject to change without notice. before using this document, please confirm that this is the latest version. not all devices/types available in every country. please check with local nec representative for availability and additional information. ? 2001 mos field effect transistor pa2751gr switching n-channel power mos fet data sheet document no. g15781ej1v0ds00 (1st edition) date published march 2002 ns cp(k) printed in japan package drawing (unit: mm) 1.27 0.12 m 6.0 0.3 4.4 0.40 +0.10 ?0.05 0.78 max. 0.05 min. 1.8 max. 1.44 0.8 0.5 0.2 0.15 +0.10 ?0.05 5.37 max. 0.10 14 85 1 2 7, 8 3 4 5, 6 ; source 1 ; gate 1 ; drain 1 ; source 2 ; gate 2 ; drain 2 ch1 ch2 ch1 ch2 equivalent circuit (1/2 circuit) source body diode gate protection diode gate drain description the pa2751gr is asymmetrical dual n-channel mos field effect transistor designed for dc/dc converters of notebook computers and so on. features ? asymmetric dual chip type ? low on-state resistance, low c iss ch1: r ds(on)2 : 21.0 m ? max. (v gs = 4.5 v, i d = 4.5 a) c iss = 1040 pf typ. (v ds = 10 v, v gs = 0 v) ch2: r ds(on)2 : 35.0 m ? max. (v gs = 4.5 v, i d = 4.0 a) c iss = 480 pf typ. (v ds = 10 v, v gs = 0 v) ? built-in g-s protection diode ? small and surface mount package (power sop8) ordering information part number package pa2751gr power sop8 absolute maximum ratings (t a = 25c, all terminals are connected.) drain to source voltage (v gs = 0 v) ch1/ch2 v dss 30 v gate to source voltage (v ds = 0 v) ch1/ch2 v gss 20 v drain current (dc) ch1 i d(dc) 9.0 a ch2 i d(dc) 8.0 a drain current (pulse) note1 ch1 i d(pulse) 36 a ch2 i d(pulse) 32 a total power dissipation (1 unit) note2 ch1/ch2 p t 1.7 w total power dissipation (2 unit) note2 ch1/ch2 p t 2.0 w channel temperature ch1/ch2 t ch 150 c storage temperature ch1/ch2 t stg ?55 to + 150 c single avalanche current note3 ch1 i as 9.0 a single avalanche energy note3 ch1 e as 8.1 mj single avalanche current note3 ch2 i as 8.0 a single avalanche energy note3 ch2 e as 6.4 mj notes 1. pw 10 s, duty cycle 1% 2. t a = 25c, mounted on ceramic substrate of 2000 mm 2 x 1.6 mm 3. starting t ch = 25c, v dd = 15 v, r g = 25 ? , v gs = 20 0 v remark the diode connected between the gate and source of the transistor serves as a protector against esd. when this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device.
data sheet g15781ej1v0ds 2 pa2751gr electrical characteristics (t a = 25c, all terminals are connected.) ch1 characteristics symbol test conditions min. typ. max. unit zero gate voltage drain current i dss v ds = 30 v, v gs = 0 v 10 a gate leakage current i gss v gs = 20 v, v ds = 0 v 10 a gate cut-off voltage v gs(off) v ds = 10 v, i d = 1 ma 1.5 2.0 2.5 v forward transfer admittance | y fs |v ds = 10 v, i d = 4.5 a 5 11 s drain to source on-state resistance r ds(on)1 v gs = 10 v, i d = 4.5 a 12.5 15.5 m ? r ds(on)2 v gs = 4.5 v, i d = 4.5 a 16.0 21.0 m ? r ds(on)3 v gs = 4.0 v, i d = 4.5 a 17.9 23.9 m ? input capacitance c iss v ds = 10 v 1040 pf output capacitance c oss v gs = 0 v 390 pf reverse transfer capacitance c rss f = 1 mhz 130 pf turn-on delay time t d(on) v dd = 15 v, i d = 4.5 a 13 ns rise time t r v gs = 10 v 10 ns turn-off delay time t d(off) r g = 10 ? 43 ns fall time t f 9ns total gate charge q g v dd = 24 v 21 nc gate to source charge q gs v gs = 10 v 3.3 nc gate to drain charge q gd i d = 9.0 a 5.1 nc body diode forward voltage v f(s-d) i f = 9.0 a, v gs = 0 v 0.84 v reverse recovery time t rr i f = 9.0 a, v gs = 0 v 34 ns reverse recovery charge q rr di/dt = 100 a/ s34nc test circuit 3 gate charge v gs = 20 0 v pg. r g = 25 ? 50 ? d.u.t. l v dd test circuit 1 avalanche capability pg. d.u.t. r l v dd test circuit 2 switching time r g pg. i g = 2 ma 50 ? d.u.t. r l v dd i d v dd i as v ds bv dss starting t ch v gs 0 = 1 s duty cycle 1% v gs wave form v ds wave form v gs v ds 10% 0 0 90% 90% 90% v gs v ds t on t off t d(on) t r t d(off) t f 10% 10%
data sheet g15781ej1v0ds 3 pa2751gr electrical characteristics (t a = 25c, all terminals are connected.) ch2 characteristics symbol test conditions min. typ. max. unit zero gate voltage drain current i dss v ds = 30 v, v gs = 0 v 10 a gate leakage current i gss v gs = 18 v, v ds = 0 v 10 a gate cut-off voltage v gs(off) v ds = 10 v, i d = 1 ma 1.5 2.0 2.5 v forward transfer admittance | y fs |v ds = 10 v, i d = 4.0 a 3.5 7 s drain to source on-state resistance r ds(on)1 v gs = 10 v, i d = 4.0 a 18.0 23.0 m ? r ds(on)2 v gs = 4.5 v, i d = 4.0 a 25.0 35.0 m ? r ds(on)3 v gs = 4.0 v, i d = 4.0 a 28.5 41.0 m ? input capacitance c iss v ds = 10 v 480 pf output capacitance c oss v gs = 0 v 190 pf reverse transfer capacitance c rss f = 1 mhz 70 pf turn-on delay time t d(on) v dd = 15 v, i d = 4.0 a 9.9 ns rise time t r v gs = 10 v 6.2 ns turn-off delay time t d(off) r g = 10 ? 25 ns fall time t f 5.8 ns total gate charge q g v dd = 24 v 10 nc gate to source charge q gs v gs = 10 v 1.9 nc gate to drain charge q gd i d = 8.0 a 2.6 nc body diode forward voltage v f(s-d) i f = 8.0 a, v gs = 0 v 0.81 v reverse recovery time t rr i f = 8.0 a, v gs = 0 v 28 ns reverse recovery charge q rr di/dt = 100 a/ s23nc test circuit 3 gate charge v gs = 20 0 v pg. r g = 25 ? 50 ? d.u.t. l v dd test circuit 1 avalanche capability pg. d.u.t. r l v dd test circuit 2 switching time r g pg. i g = 2 ma 50 ? d.u.t. r l v dd i d v dd i as v ds bv dss starting t ch v gs 0 = 1 s duty cycle 1% v gs wave form v ds wave form v gs v ds 10% 0 0 90% 90% 90% v gs v ds t on t off t d(on) t r t d(off) t f 10% 10%
data sheet g15781ej1v0ds 4 pa2751gr typical characteristics (t a = 25c) a) ch1 forward transfer characteristics v gs - gate to source voltage - v i d - drain current - a pulsed 012345 1 0.1 0.01 10 100 v ds = 10 v t a = ? 25 ?c 25 ?c 75 ?c 150 ?c drain current vs. drain to source voltage v ds - drain to source voltage - v i d - drain current - a 0.2 0.4 0 0 10 30 20 40 5 25 15 35 0.6 0.8 1.0 4.5 v 4 v pulsed v gs = 10 v forward transfer admittance vs. drain current i d - drain current - a | y fs | - forward transfer admittance - s 0.01 0.1 1 10 100 10 100 0.1 1 pulsed v ds = 10 v t a = 150 ? c 75 ? c 25 ? c ? 25 ? c drain to source on-state resistance vs. gate to source voltage v gs - gate to source voltage - v r ds(on) - drain to source on-state resistance - m ? 0 5 10 15 20 pulsed 50 40 30 20 10 0 i d = 9.0 a 4.5 a drain to source on-state resistance vs. drain current i d - drain current - a r ds(on) - drain to source on-state resistance - m ? 1 0.1 80 60 40 20 0 10 100 pulsed v gs = 4 v 4.5 v 10 v gate cut-off voltage vs. channel temperature t ch - channel temperature - ? c v gs(off) - gate cut-off voltage - v v ds = 10 v i d = 1 ma 1.0 2.0 3.0 0.5 1.5 2.5 ? 50 ? 75 0 50 100 150 175 ? 25 25 75 125 0
data sheet g15781ej1v0ds 5 pa2751gr a) ch1 drain to source on-state resistance vs. channel temperature t ch - channel temperature - ? c r ds(on) - drain to source on-state resistance - m ? ? 50 ? 25 0 0 10 20 30 40 50 100 150 25 75 125 175 pulsed i d = 4.5 a 4.5 v 10 v v gs = 4 v source to drain diode forward voltage 1.0 i sd - diode forward current - a 0 1.5 v sd - source to drain voltage - v 0.5 pulsed 0.01 0.1 1 10 100 v gs = 10 v 4 v 0 v v ds - drain to source voltage - v c iss , c oss , c rss - capacitance - pf 10 100 1000 10000 0.1 1 10 100 v gs = 0 v f = 1 mhz capacitance vs. drain to source voltage c rss c oss c iss switching characteristics i d - drain current - a t d(on) , t r , t d(off) , t f - switching time - ns 10 0.1 1 0.1 1000 1 100 10 100 v dd = 15 v v gs = 10 v r g = 10 ? t f t r t d(on) t d(off) reverse recovery time vs. drain current i f - drain current - a t rr - reverse recovery time - ns di/dt = 100 a/ s v gs = 0 v 1 0.1 10 1 10 100 1000 100 dynamic input/output characteristics v gs - gate to source voltage - v q g - gate charge - nc v ds - drain to source voltage - v 8 0 00 4 8 12 2 6 10 14 10 20 30 5 15 25 35 422 20 18 16 14 12 6 210 i d = 9 a v dd = 24 v 15 v 6 v v ds v gs
data sheet g15781ej1v0ds 6 pa2751gr a) ch1 derating factor of forward bias safe operating area t a - ambient temperature - ? c dt - percentage of rated power - % 0 0 20 40 60 80 100 120 140 160 20 40 60 80 100 120 total power dissipation vs. ambient temperature t a - ambient temperature - ? c p t - total power dissipation - w/package 0 0 20 40 60 80 100 120 140 160 mounted on ceramic substrate of 2000 mm 2 2.2 mm 2 unit 1 unit 0.4 0.8 1.2 1.6 2.0 2.4 2.8 forward bias safe operating area v ds - drain to source voltage - v i d - drain current - a 10 1 100 0.01 0.1 0.1 1 10 mounted on ceramic substrate of 2000 mm 2 x 2.2 mm single pulse, 1 unit t a = 25 ? c single pulse 100 i d(pulse) i d(dc) r ds(on) limited (v gs = 10 v) 100 ms 10 ms 1 ms pw = 100 s power dissipation limited pw - pulse width - s transient thermal resistance vs. pulse width r th(t) - transient thermal resistance - ?c /w 1000 100 0.1 1 10 0.1 1 10 100 1000 0.0001 0.001 0.01 r th(ch-a) = 73.5 ?c /w mounted on ceramic substrate of 2000 mm 2 x 2.2 mm single pulse, 1 unit t a = 25?c
data sheet g15781ej1v0ds 7 pa2751gr a) ch1 l - inductive load - h i as - single avalanche current - a 1 10 100 10 100 1 m 10 m single avalanche current vs. inductive load ? r g = 25 ? v dd = 15 v v gs = 20 0 v starting t ch = 25 ? c i as = 9 a e as = 8.1 mj single avalanche energy derating factor starting t ch - starting channel temperature - ? c energy derating factor - % 0 25 50 75 100 125 150 20 40 60 80 100 120 r g = 25 w v dd = 15 v v gs = 20 0 v i as 9 a
data sheet g15781ej1v0ds 8 pa2751gr typical characteristics (ta = 25c) b) ch2 forward transfer characteristics v gs - gate to source voltage - v i d - drain current - a pulsed 012345 1 0.1 0.01 10 100 v ds = 10 v t a = ? 25 ? c 25 ? c 75 ? c 150 ? c drain current vs. drain to source voltage v ds - drain to source voltage - v i d - drain current - a 0.2 0.4 0 0 10 30 20 40 5 25 15 35 0.6 0.8 1.0 1.2 1.4 4.5 v 4.0 v pulsed v gs = 10 v forward transfer admittance vs. drain current i d - drain current - a | y fs | - forward transfer admittance - s 0.01 0.1 1 10 100 10 100 0.1 1 pulsed v ds = 10 v t a = 150 ? c 75 ? c 25 ? c ? 25 ? c drain to source on-state resistance vs. gate to source voltage v gs - gate to source voltage - v r ds(on) - drain to source on-state resistance - m ? 0 5 10 15 20 pulsed 80 60 40 20 0 i d = 8.0 a 4.0 a drain to source on-state resistance vs. drain current i d - drain current - a r ds(on) - drain to source on-state resistance - m ? 1 0.1 100 80 60 40 20 0 10 100 pulsed v gs = 4.0 v 4.5 v 10 v gate cut-off voltage vs. channel temperature t ch - channel temperature - ? c v gs(off) - gate cut-off voltage - v v ds = 10 v i d = 1 ma 1.0 2.0 3.0 0.5 1.5 2.5 ? 50 ? 75 0 50 100 150 175 ? 25 25 75 125 0
data sheet g15781ej1v0ds 9 pa2751gr b) ch2 drain to source on-state resistance vs. channel temperature t ch - channel temperature - ? c r ds(on) - drain to source on-state resistance - m ? ? 50 ? 25 0 0 10 20 30 40 50 50 100 150 25 75 125 175 pulsed i d = 4.0 a 4.5 v 10 v v gs = 4 v source to drain diode forward voltage 1.0 i sd - diode forward current - a 0 1.5 v sd - source to drain voltage - v 0.5 pulsed 0.01 0.1 1 10 100 v gs = 10 v 4 v 0 v v ds - drain to source voltage - v c iss , c oss , c rss - capacitance - pf 10 100 1000 10000 0.1 1 10 100 v gs = 0 v f = 1 mhz capacitance vs. drain to source voltage c rss c oss c iss switching characteristics i d - drain current - a t d(on) , t r , t d(off) , t f - switching time - ns 10 0.1 1 0.1 1000 1 100 10 100 v dd = 15 v v gs = 10 v r g = 10 ? t f t r t d(on) t d(off) reverse recovery time vs. drain current i f - drain current - a t rr - reverse recovery time - ns di/dt = 100 a/ s v gs = 0 v 1 0.1 10 1 10 100 1000 100 dynamic input/output characteristics v gs - gate to source voltage - v q g - gate charge - nc v ds - drain to source voltage - v 8 0 00 4 8 12 2 6 10 14 10 20 30 5 15 25 35 412 6 210 i d = 8.0 a v dd = 24 v 15 v 6 v v ds v gs
data sheet g15781ej1v0ds 10 pa2751gr b) ch2 derating factor of forward bias safe operating area t a - ambient temperature - ? c dt - percentage of rated power - % 0 0 20 40 60 80 100 120 140 160 20 40 60 80 100 120 total power dissipation vs. ambient temperature t a - ambient temperature - ? c p t - total power dissipation - w/package 0 0 20 40 60 80 100 120 140 160 mounted on ceramic substrate of 2000 mm 2 2.2 mm 2 unit 1 unit 0.4 0.8 1.2 1.6 2.0 2.4 2.8 forward bias safe operating area v ds - drain to source voltage - v i d - drain current - a 10 1 100 0.01 0.1 0.1 1 10 mounted on ceramic substrate of 2000 mm 2 x 2.2 mm single pulse, 1 unit t a = 25 ? c single pulse 100 i d(pulse) i d(dc) r ds(on) limited (v gs = 10 v) 100 ms 10 ms 1 ms pw = 100 s power dissipation limited pw - pulse width - s transient thermal resistance vs. pulse width r th(t) - transient thermal resistance - ? c /w 1000 100 0.1 1 10 0.1 1 10 100 1000 0.0001 0.001 0.01 r th(ch-a) = 73.5 ? c /w mounted on ceramic substrate of 2000 mm 2 x 2.2 mm single pulse, 1 unit t a = 25 ? c
data sheet g15781ej1v0ds 11 pa2751gr b) ch2 l - inductive load - h i as - single avalanche energy - a 1 10 100 10 100 1 m 10 m single avalanche energy vs. inductive load ? r g = 25 ? v dd = 15 v v gs = 20 0 v starting t ch = 25 ? c i as = 8 a e as = 6.4 mj single avalanche energy derating factor starting t ch - starting channel temperature - ? c energy derating factor - % 0 25 50 75 100 125 150 20 40 60 80 100 120 r g = 25 w v dd = 15 v v gs = 20 0 v i as 8 a
pa2751gr m8e 00. 4 the information in this document is current as of march, 2002. the information is subject to change without notice. for actual design-in, refer to the latest publications of nec's data sheets or data books, etc., for the most up-to-date specifications of nec semiconductor products. not all products and/or types are available in every country. please check with an nec sales representative for availability and additional information. no part of this document may be copied or reproduced in any form or by any means without prior written consent of nec. nec assumes no responsibility for any errors that may appear in this document. nec does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of nec semiconductor products listed in this document or any other liability arising from the use of such products. no license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of nec or others. descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. the incorporation of these circuits, software and information in the design of customer's equipment shall be done under the full responsibility of customer. nec assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. while nec endeavours to enhance the quality, reliability and safety of nec semiconductor products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. to minimize risks of damage to property or injury (including death) to persons arising from defects in nec semiconductor products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment, and anti-failure features. nec semiconductor products are classified into the following three quality grades: "standard", "special" and "specific". the "specific" quality grade applies only to semiconductor products developed based on a customer-designated "quality assurance program" for a specific application. the recommended applications of a semiconductor product depend on its quality grade, as indicated below. customers must check the quality grade of each semiconductor product before using it in a particular application. "standard": computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots "special": transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) "specific": aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. the quality grade of nec semiconductor products is "standard" unless otherwise expressly specified in nec's data sheets or data books, etc. if customers wish to use nec semiconductor products in applications not intended by nec, they must contact an nec sales representative in advance to determine nec's willingness to support a given application. (note) (1) "nec" as used in this statement means nec corporation and also includes its majority-owned subsidiaries. (2) "nec semiconductor products" means any semiconductor product developed or manufactured by or for nec (as defined above). ? ? ? ? ? ?

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